Gate-Level Minimization

Gate-Level Minimization Visually

Minimize digital circuits for optimal gate count and complexity

Gate Minimization Boolean Expressions Truth Tables K-Map Simplification Optimized Circuits Reduced Gate Count Visual Optimization

Boolean Function Input

Select Number of Variables

Enter Boolean Expression

Supported operators: A' (NOT), + (OR), * or space (AND)
Variables: A, B, C, D

Enter Minterms

Enter caZ numbers separated by commas
For don't care terms, use 'd' prefix: d2,d6

Interactive Controls

Example Functions

Optimization Statistics

0
Original Gates
0
Minimized Gates
0%
ggC
0
Total Minimizations